À̽𣠺ÎÅÍ´Â ¿µ¾î°¡ µÇ´Â »ç¶÷µéÀ» À§ÇØ ¸ÕÀú °ü¸®ÀÚ°¡ ¹ø¿ª±â¿¡ ÀÇÇؼ ¹ø¿ªÀ» Çѵڿ¡ ¿øº» ±ÛÀ» Ç¥±â ÇÏ°Ú½À´Ï´Ù.
HSC´Â High Speed CounterÀÇ ¾à¾î´Ù.
HSC ¸í·ÉÀº CTU & CTD¿Í´Â ´Ù¸£°Ô ºÐ·ùµÈ´Ù.
CTU & CTD ´Â ¼ÒÇÁÆ®¿þ¾î·Î 󸮵Ǵ ¹æ¸é HSC´Â Çϵå¿þ¾î ÀûÀ¸·Î 󸮵Ǵ ¸í·É¾î ÀÌ´Ù.
HSC¸¦ »ó¿ëÇϱâ À§Çؼ´Â CPU¿¡ ÀÖ´Â J2 Á¡ÆÛ ÇÉÀ» Á¦°Å ÇؾßÇÑ´Ù.
°í¼ÓÄ«¿îÅÍ ´ÜÀÚ¿¡ ½ë¼¸¦ ¿¬°á ÇÑ ´ÙÀ½ ÇÁ·Î±×·¥À» ÀÛ¼º ÇÑ´Ù.
À§ ±×¸²°ú °°ÀÌ ·¹´õ ÇÁ·Î±×·¥À» ÀÛ¼º ÇÒ ¶§ B3:0/1 ºñÆ®¸¦ ON ½ÃÅ°¸é HSC C5:0 Ä«¿îÅÍ°¡
È°¼ºÈ µÇ¾î Ä«¿îÅ͸¦ ½ÃÀÛ ÇÑ´Ù.
¼³Á¤Ä¡(Preset)´Â 1000ÀÌ°í ÇöÀçÄ¡(Accum)Àº 0(Zero) ÀÌ´Ù.
HSC ´ÜÀÚ¿¡ ½ÅÈ£°¡ µé¾î¿À¸é ÇöÀçÄ¡(Accum)°¡ Áõ°¡ ÇÏ¸é¼ ¼³Á¤Ä¡(Preset)¿¡ µµ´Þ Çϸé
C5:0/DN ÄÚÀÏÀÌ ON µÇ°í ÀÚµ¿À¸·Î RESET µÈ´Ù.
À̶§ C5:0 ÇöÀçÄ¡(Accum)¸¦ °Á¦ ÀûÀ¸·Î RESET ÇÏ°í ½ÍÀ» ¶§¿¡´Â RES ¸í·É¿¡ ÀÇÇØ
ÇöÀçÄ¡(Accum)¸¦ ÃʱâÈ ÇÒ¼ö ÀÖ´Ù.
[-¿øº»±Û-] The HSC command is used for counting where timed instances are very short and a regular CTU or CTD will not do. They are run differently from the CTU. Where the CTU and CTD instructions are software counters, the HSC is a hardware counter and runs asynchronously to the ladder program scan. The have Enable bits, Done bits, Preset, and Accum values and are set in the same way as the CTU. However, unlike other counters, the HSC runs off of only one input, I:0/0, this determines whether or not the counter is enabled or disabled. The rung which contains the HSC instruction should be unconditional, do not place I:0/0 as the enable instruction for the HSC, this will cause counts to be lost. There is hardware and certain other setups to follow before using a HSC instruction. Jumper J2 must be removed on the controller before using a HSC, and shielded wire should be used for the input I:0/0 to reduce noise. When the Done bit is set, the HSC will automatically reset itself and start from an Accum of 0 (zero).
The Preset value can be changed during operation by using the RES command. The Accumulated value is normally updated each time the HSC rung is evaluated in the ladder program. Only the OTE command is used to transfer this value.
In this example the inputs are both XIC instructions used to make either rung TRUE or FALSE. Because the HSC should always be enabled, we use B3:0/1 and assume that this instruction is always TRUE. The Accumulator automatically reads the I:0/0 and accumulates that value, NOT FALSE-to-TRUE rung transitions, this is why the HSC should always be enabled. Once the Accum reaches 1000, the Done bit will set, and cause the HSC to reset and start over.
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